Development of Cryogenic CMOS Circuits: From Characterizing 180nm CMOS Read-out Circuitry to Designing Generic Circuit Blocks Using 130nm CMOS

Chen, Xiuhan

Full Metadata

Overview

Year:: 2024
Contributor:: Chen, Xiuhan (creator); Zaslavsky, Alexander (Advisor); Patterson III, William (Advisor); Brown University. Engineering: Electrical Sciences and Computer Engineering (sponsor)
Genre:: theses
Subject:: Analog CMOS integrated circuits; Integrated circuits; Cryo-CMOS; Readout circuits
Extent:: x, 43 p.

Files

Description

Abstract:: In this thesis, we explore the development and enhancement of cryogenic circuitry, focus- ing particularly on the characterization of cryogenic read-out circuits for magnetic tunnel junctions (MTJs) and the design of generic cryogenic circuitry blocks for more advanced future sensors. Our objective is to analyze the performance of foundry-fabricated 180 nm CMOS read-out circuitry under cryogenic conditions and develop cryo-capable circuit blocks in a 130 nm CMOS process that can offer amplification and read-out functionality. Designing integrated circuits for operation at cryogenic temperatures faces significant challenges. These include alterations in device characteristics such as carrier mobility and transistor threshold voltages, which can affect the overall circuit behavior unpredictably. Overcoming these challenges requires design strategies to mitigate the absence of reli- able low-temperature simulation models and ensure operational stability and effectiveness. Even so, conducting actual cryogenic measurements to verify circuit performance remains essential. Our work starts with the measurement of the cryogenic readout circuitry designed by Yitao Xu (ScM 2022, Brown University). This circuitry, consisting of current mirrors, DC constant-current bias voltage blocks, sense amplifiers, and buffer amplifiers, was intended for detection of small magnetic fields via resistance changes in MTJ sensors. This chip had a total power budget limited to ∼ 100 μW. It was fabricated using the Silterra 180 nm CMOS process and was initially tested with 30 kΩ resistors to approximate MTJ sensors at T = 4.2 K liquid helium temperature. In the course of testing, we demonstrated that the input bias sources and both the buffer and sensing amplifiers were functional. The amplifiers provided gain of up to 20 dB over a reasonable bandwidth. However, some of the circuit elements did not work as designed. Building on the insights gained from the low-temperature testing of the Silterra-fabricated circuitry, we designed a series of more advanced cryogenic circuit blocks. These new de- signs aim to expand the application potential of cryogenic electronics beyond MTJ sensors and include parametrized current mirrors, varactors, and transimpedance amplifiers inte- grated with alignment marks and predesigned contacts for post-CMOS sensor integration. They were submitted for fabrication in the Skywater 130 nm CMOS technology under the auspices of the Nanotechnology Xcellerator program organized by the National Institute of Standards and Technology. The Skywater circuits should offer enhanced performance but the next generation of graduate students will test those circuits.
Notes:: Thesis (Sc. M.)--Brown University, 2024

Content

Citation

Chen, Xiuhan, "Development of Cryogenic CMOS Circuits: From Characterizing 180nm CMOS Read-out Circuitry to Designing Generic Circuit Blocks Using 130nm CMOS" (2024). Electrical Sciences and Computer Engineering Theses and Dissertations. Brown Digital Repository. Brown University Library. https://repository.library.brown.edu/studio/item/bdr:a8z96vj9/

Relations

Collection:

Electrical Sciences and Computer Engineering Theses and Dissertations

Theses and Dissertations for the Electrical Sciences and Computer Engineering department.
...